PBSS4041SN and PBSS4041SP model issues

The NXP PBSS4041SN and PBSS4041SP dual transistor components are excellent for low voltage, high current applications. The advantage of having two transistors in a single package is usually the near identical performance and good thermal coupling but for small volume hand placed production two transistors placed in a single package can save on build time and make for easier pin alignment.

The relevant models were downloaded and saved into a folder where they could be loaded by LTSpice. An existing circuit was then loaded and other transistors were replaced by these new ones. Once this was done the simulation was run but LTSpice failed to find the new models. A few sanity checks revealed that the files had been loaded correctly and the changes made to the transistors on the circuit were also correct.

Opening both files revealed that there was a sub-circuit that consisted of a transistor and a diode. Both referenced models were contained within the sub-circuit and then the associated models followed at the end of the file. In theory this should have worked because the model becomes a private member of the sub-circuit and as far as I’m aware, forward referencing is allowed.

Both files were then rearranged so that the model was the first object to be defined followed by the sub circuit containing the model and diode references. The files were saved and the simulation was rerun. This time no errors were generated but the circuit behaviour was nothing like what was expected. Probing voltages and currents revealed that something odd was going on. The files were opened up again to check for pin connections and the file containing the model of the PBSS4041SP (where ‘P’ stands for ‘PNP’) declared that the transistor was an NPN transistor in the comment and in the model definition. A file comparison revealed that the transistor properties were different between the files so it was not just a simple matter of someone copying the file and only renaming it.

The comment and more importantly the model base type was changed from NPN to PNP and now this time, the circuit simulation performed as expected.

The working models for these devices can be downloaded from here: –



This is not the first time that models published by a major chip manufacturer have had fundamental issues that prevent them from being used. In this case it is of concern that these models were published in October 2008 and that quite fundamental errors have not been noticed or corrected in 8 years (at the time of writing). This could either be an indication that no one is simulating circuit performance with these devices or that sales quantity is so low the manufacturer has not had the feedback it needs to correct the problems. Either way, it makes me wonder if these devices should be used in new circuit designs and if the PNP model is an accurate reflection of a real device. It certainly seems to behave in a complimentary way to its NPN counterpart.

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